1. Field of the Invention
The present patent relates to a semiconductor memory device, and method for programming and reading the same, and more specifically, to a page buffer of a non-volatile memory device, and method for programming and reading the same.
2. Discussion of Related Art
A semiconductor memory device can be classified into a volatile memory device in which stored information is erased as the supply of electricity is stopped and a non-volatile memory device in which information keeps stored even if the supply of electricity is stopped. The non-volatile memory device may include EPROM (Erasable Programmable Read Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory), a flash memory device and the like.
In the flash memory device, a memory cell which stores data includes cell transistors. Each of the cell transistors has a control gate and a floating gate. The flash memory device stores information using a tunneling phenomenon through an insulating film.
The flash memory device can be classified into a NOR type flash memory device and a NAND type flash memory device depending on the configuration of cells. The NOR type flash memory device is typically adapted to read a small amount of information in a non-sequential manner at high speed, whereas the NAND type flash memory device is typically adapted to read information in a sequential manner. The NAND type flash memory device programs or stores data using a page buffer.
FIG. 1 is a schematic layout diagram of a cell array region and a page buffer in the prior art. In FIG. 1, A′ and B′ are expanded views of portions “A” and “B”, respectively, and reference numeral 10 indicates a cell array region.
The conventional page buffer has a structure in which four pager buffers are stacked in consideration of the layout of the page buffer, as shown in FIG. 1. For this reason, however, even page buffers applied to the same memory cell array have different shapes because of a difference in layout. Accordingly, during a read operation, a SO node being a sensing node of the page buffer is floated, and the degree that the SO node is affected by outside influence becomes different, so that the four page buffers have a different sensing difference. Therefore, there is a problem in that errors occur in testing. That is, during the read operation, the sensing node is floated. Accordingly, there are problems in that the sensing node does not detect a correct value in detecting data, and a failure is thus generated due to coupling capacitance with a neighboring sensing node. Furthermore, as semiconductor technology is advanced, the layout of the page buffer becomes difficult and several stages of page buffers are used accordingly. Accordingly, failure by the coupling capacitance among the sensing nodes becomes more problematic.